RTL-SDR Front End Scicos Simulation

RTL-SDR Front End Block Diagram

The RTL-SDR receiver is a simple but very useful device. It can receive signals from 25MHz to about 1700MHz. The Front End block diagram is shown in Figure 1. Receive signals come into the antenna port, are amplified by an LNA low noise mplifier, then RF BPF band pass filtered to remove image components (RF BPA tracks the local oscillator). A mixer stage multiplies the filtered input by a local oscillator to move the input spectrum down to an IF frequency of 3.57MHz. The signal is then filtered by an IF band pass filter and amplified by a variable gain IF amplifier. Finally the signal is converted to pulse code modulation by an 8bit ADC analog to digital converter sampling at 28.8Msps. This digital data stream is then down converted and processed by a DSP section which will be covered in a later post.

Figure 2 shows the Scicos simulation of the RTL-SDR front end. An AM modulated signal at 162MHz & an image carrier at 162MHz + 2*Freq_IF = 162 + 2*3.57 = 169.14MHz are input to the tracking RF bandpass filter. Figure 3 shows the AM modulator super block. A 162MHz carrier is modulated with a tone of 1MHz.
vc(t)=[1 + m*sin(wm*t)]*sin(wc*t)
Figure 4 shows the 100% modulated carrier with the modulation waveform below. The output spectrum shows the carrier with upper and lower sidebands USB/LSB. Figure 5 shows the action of the RF BPF removing the image carrier. Figure 6 shows the action of the IF BPF removing the sum components generated by the mixing process. Finally Figure 7 shows the ADC PCM process. The IF 3.57MHz AM modulated carrier is on the bottom trace, the middle trace is the 28.8Msps PAM samples taken by the ADC and the top trace is the 8bit equivalent of each PAM pulse. So for example when the PAM pulse is 253, the bit stream is 11111101. Figure 8 is the YouTube video that shows all the waveforms in detail.